Energy efficient co-adaptive instruction fetch and issue
نویسندگان
چکیده
منابع مشابه
Energy-Effective Instruction Fetch Unit for Wide Issue Processors
Continuing advances in semiconductor technology and demand for higher performance will lead to more powerful, superpipelined and wider issue processors. Instruction caches in such processors will consume a significant fraction of the on-chip energy due to very wide fetch on each cycle. This paper proposes a new energy-effective design of the fetch unit that exploits the fact that not all instru...
متن کاملDesigning Energy-Efficient Fetch Engines
This dissertation evaluates factors that affect the energy-efficiency of the fetch engine in a programmable uniprocessor. The central thesis is that branch prediction is one of the key factors affecting overall processor energy-efficiency. Cooling costs, extending battery life in mobile devices, and reducing utility costs for wall-powered systems, especially data centers are growing concerns. T...
متن کاملUsing Dynamic Branch Behavior for Power-Efficient Instruction Fetch
Power consumption has become an increasing concern in high performance microprocessor design in terms of packaging and cooling cost. The fetch unit including instruction cache contributes a large portion of the total power consumption in the microprocessor. The instruction cache itself suffers some hidden power consumption due to dynamic control flows. Although capturing the dynamic control flo...
متن کاملIncreasing Instruction Fetch Energy-eeciency of a Vlsi Microprocessor
VLSI devices with high power demands have several important drawbacks; power to run the chip must be supplied externally, and power is dissipated as heat, which must be removed from the circuit. Processor architects tend to view these issues as circuit technology or packaging problems. However, these solutions are limited, and do not necessarily provide insight into more direct approaches to en...
متن کاملWay Memoization to Reduce Fetch Energy in Instruction Caches
Instruction caches consume a large fraction of the total power in modern low-power microprocessors. In particular, set-associative caches, which are preferred because of lower miss rates, require greater access energy on hits than direct-mapped caches; this is because of the need to locate instructions in one of several ways. Way prediction has been proposed to reduce power dissipation in conve...
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ژورنال
عنوان ژورنال: ACM SIGARCH Computer Architecture News
سال: 2003
ISSN: 0163-5964
DOI: 10.1145/871656.859636